Abhijit is a Director of Research and Group Leader with N3Cat. Before this role, he was a Post-Doctoral Researcher with the TARAN team at INRIA. Earlier in his career, he briefly worked as a Senior Silicon Design Engineer at AMD, contributing to the performance modelling team responsible for the Zen microarchitecture. Abhijit was honoured with the Best PhD Thesis Award in Computer Science & Engineering from the Indian Institute of Technology (IIT) Guwahati, India. His dissertation focused on designing data-aware chip-scale networks to enhance the performance of many-core systems. Abhijit's research primarily revolves around Computer Architecture, with current projects aimed at developing efficient chip and package-scale networks, caches, and Deep Neural Network (DNN) accelerators. His video tutorials on using the gem5 simulator are among the most popular on YouTube, garnering over 35K views. He also created and maintain CA Deadlines, a website that provides countdowns to top Computer Architecture conference deadlines. More about Abhijit can be found here.
Abhijit is a Director of Research and Group Leader with N3Cat. Before this role, he was a Post-Doctoral Researcher with the TARAN team at INRIA. Earlier in his career, he briefly worked as a Senior Silicon Design Engineer at AMD, contributing to the performance modelling team responsible for the Zen microarchitecture. Abhijit was honoured with the Best PhD Thesis Award in Computer Science & Engineering from the Indian Institute of Technology (IIT) Guwahati, India. His dissertation focused on designing data-aware chip-scale networks to enhance the performance of many-core systems. Abhijit's research primarily revolves around Computer Architecture, with current projects aimed at developing efficient chip and package-scale networks, caches, and Deep Neural Network (DNN) accelerators. His video tutorials on using the gem5 simulator are among the most popular on YouTube, garnering over 35K views. He also created and maintain CA Deadlines, a website that provides countdowns to top Computer Architecture conference deadlines. More about Abhijit can be found here.
Abhijit is a Director of Research and Group Leader with N3Cat. Before this role, he was a Post-Doctoral Researcher with the TARAN team at INRIA. Earlier in his career, he briefly worked as a Senior Silicon Design Engineer at AMD, contributing to the performance modelling team responsible for the Zen microarchitecture. Abhijit was honoured with the Best PhD Thesis Award in Computer Science & Engineering from the Indian Institute of Technology (IIT) Guwahati, India. His dissertation focused on designing data-aware chip-scale networks to enhance the performance of many-core systems. Abhijit's research primarily revolves around Computer Architecture, with current projects aimed at developing efficient chip and package-scale networks, caches, and Deep Neural Network (DNN) accelerators. His video tutorials on using the gem5 simulator are among the most popular on YouTube, garnering over 35K views. He also created and maintain CA Deadlines, a website that provides countdowns to top Computer Architecture conference deadlines. More about Abhijit can be found here.
