Das_Abhijits
Abhijit Das
Group Leader
Abhijit leads the "Chips Network" group within N3Cat, which is dedicated to pioneering advancements in chip and package-scale communication infrastructures essential for the next generation of computer architectures.

Abhijit is a Post-Doctoral Researcher with N3Cat, hosted by Dr. Sergi Abadal. Previously, he was a Post-Doctoral Researcher in the TARAN team of INRIA. Prior to that, he was a Senior Silicon Design Engineer at AMD, where he was part of the performance modelling team that designed the Zen microarchitecture. Abhijit received the prestigious Best PhD Thesis Award in Computer Science & Engineering from the Indian Institute of Technology (IIT) Guwahati, India. His dissertation explored the design of data-aware chip-scale networks to improve the performance of many-core systems. Abhijit's broad area of research is Computer Architecture and his tutorials on the gem5 simulator are very popular on YouTube with over 32K+ views. He built and maintain CA Deadlines, a website showing countdowns to top Computer Architecture (CA) conference deadlines. More about him can be found here.

 

Abhijit leads the "Chips Network" group within N3Cat, which is dedicated to pioneering advancements in chip and package-scale communication infrastructures essential for the next generation of computer architectures.

Abhijit is a Post-Doctoral Researcher with N3Cat, hosted by Dr. Sergi Abadal. Previously, he was a Post-Doctoral Researcher in the TARAN team of INRIA. Prior to that, he was a Senior Silicon Design Engineer at AMD, where he was part of the performance modelling team that designed the Zen microarchitecture. Abhijit received the prestigious Best PhD Thesis Award in Computer Science & Engineering from the Indian Institute of Technology (IIT) Guwahati, India. His dissertation explored the design of data-aware chip-scale networks to improve the performance of many-core systems. Abhijit's broad area of research is Computer Architecture and his tutorials on the gem5 simulator are very popular on YouTube with over 32K+ views. He built and maintain CA Deadlines, a website showing countdowns to top Computer Architecture (CA) conference deadlines. More about him can be found here.

 

Abhijit leads the "Chips Network" group within N3Cat, which is dedicated to pioneering advancements in chip and package-scale communication infrastructures essential for the next generation of computer architectures.

Abhijit is a Post-Doctoral Researcher with N3Cat, hosted by Dr. Sergi Abadal. Previously, he was a Post-Doctoral Researcher in the TARAN team of INRIA. Prior to that, he was a Senior Silicon Design Engineer at AMD, where he was part of the performance modelling team that designed the Zen microarchitecture. Abhijit received the prestigious Best PhD Thesis Award in Computer Science & Engineering from the Indian Institute of Technology (IIT) Guwahati, India. His dissertation explored the design of data-aware chip-scale networks to improve the performance of many-core systems. Abhijit's broad area of research is Computer Architecture and his tutorials on the gem5 simulator are very popular on YouTube with over 32K+ views. He built and maintain CA Deadlines, a website showing countdowns to top Computer Architecture (CA) conference deadlines. More about him can be found here.